Data di Pubblicazione:
2005
Abstract:
We describe the application ESBC to perform the timing analysis of a combinatorial circuit. The circuit is described by formulas of Classical Logic and the delays of propagation of the signals in a gate are represented by a kind of valuation form semantics. ESBC computes the exact stabilization times at which the output signals stabilize.
Tipologia CRIS:
Relazione (in Volume)
Elenco autori:
Avellone, A; Ferrari, Mauro; Fiorentini, C; Fiorino, G; Moscato, U.
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